
PIC18F1230/1330
2009 Microchip Technology Inc.
DS39758D-page 195
REGISTER 20-4:
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300005h)
U-0
R/P-1
U-0
—
—HPOL(1)
LPOL(1)
PWMPIN
—
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
u = Unchanged from programmed state
bit 7-4
Unimplemented:
Read as ‘0’
bit 3
HPOL:
High Side Transistors Polarity bit (Odd PWM Output Polarity Control bit)(1)
1
= PWM1, PWM3 and PWM5 are active-high (default)
0
= PWM1, PWM3 and PWM5 are active-low
bit 2
LPOL:
Low Side Transistors Polarity bit (Even PWM Output Polarity Control bit)(1)
1
= PWM0, PWM2 and PWM4 are active-high (default)
0
= PWM0, PWM2 and PWM4 are active-low
bit 2
PWMPIN:
PWM Output Pins Reset State Control bit
1
= PWM outputs disabled upon Reset
0
= PWM outputs drive active states upon Reset(2)
bit 0
Unimplemented:
Read as ‘0’
Note 1:
Polarity control bits, HPOL and LPOL, define PWM signal output active and inactive states, PWM states
generated by the Fault inputs or PWM manual override.
2:
When PWMPIN = 0, PWMEN<2:0> = 100. PWM output polarity is defined by HPOL and LPOL.